Abstract: Programmable logic is emerging as an attractive solution for many digital signal processing application. This paper presents an FPGA implementation of an iterative image restoration technique. The simulation results show the speedup that can be achieved by implementing this algorithm on reconfigurable hardware as compared to the implementation of the algorithm using software. The process from design entry to files download are introduced.
Hassan, F., Ismail, G., & Hamza, E. (2006). DESIGN OF AN ITERATIVE IMAGE RESTORATION ALGORITHM USING FPGA. The International Conference on Electrical Engineering, 5(5th International Conference on Electrical Engineering ICEENG 2006), 1-14. doi: 10.21608/iceeng.2006.33674
MLA
Fawzy Eltohamy Hassan; Gouda Ismail; Esam Hassan Hamza. "DESIGN OF AN ITERATIVE IMAGE RESTORATION ALGORITHM USING FPGA". The International Conference on Electrical Engineering, 5, 5th International Conference on Electrical Engineering ICEENG 2006, 2006, 1-14. doi: 10.21608/iceeng.2006.33674
HARVARD
Hassan, F., Ismail, G., Hamza, E. (2006). 'DESIGN OF AN ITERATIVE IMAGE RESTORATION ALGORITHM USING FPGA', The International Conference on Electrical Engineering, 5(5th International Conference on Electrical Engineering ICEENG 2006), pp. 1-14. doi: 10.21608/iceeng.2006.33674
VANCOUVER
Hassan, F., Ismail, G., Hamza, E. DESIGN OF AN ITERATIVE IMAGE RESTORATION ALGORITHM USING FPGA. The International Conference on Electrical Engineering, 2006; 5(5th International Conference on Electrical Engineering ICEENG 2006): 1-14. doi: 10.21608/iceeng.2006.33674
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