Document Type : Original Article
Egyptian Armed Forces.
Dept. of Electronics and Electrical Communications Engineering Faculty of Engineering, Cairo University, Egypt.
Boundary Scan testing is the IEEE Standard 1149.1 that overcomes many of the drawbacks of the other traditional test techniques. Boundary scan architecture enables us to go step in the direction of the portable testing systems. Designing
testable circuits and interfacing it with the portable computer evaluate the design as a real time application. Therefore, IEEE-1149.1 boundary scan architecture is presented in this paper. A testing architecture of the boundary scan, designed for FPGA, is implemented and evaluated. Channel card of multiplexer is selected as a case study for this evaluation.