Boundary Scan testing is the IEEE Standard 1149.1 that overcomes many of the drawbacks of the other traditional test techniques. Boundary scan architecture enables us to go step in the direction of the portable testing systems. Designing testable circuits and interfacing it with the portable computer evaluate the design as a real time application. Therefore, IEEE-1149.1 boundary scan architecture is presented in this paper. A testing architecture of the boundary scan, designed for FPGA, is implemented and evaluated. Channel card of multiplexer is selected as a case study for this evaluation.
Ibrahim, H., Ragaee, M., & Mostafa, H. (2018). EXPERMENTAL ANALYSIS OF THE BOUNDARY SCAN AS DESIGN FOR TESTING TECHNIQUE. The International Conference on Electrical Engineering, 11(11th International Conference on Electrical Engineering ICEENG 2018), 1-9. doi: 10.21608/iceeng.2018.30151
MLA
Hossam Ibrahim; Magdy F. Ragaee; Hassan Mostafa. "EXPERMENTAL ANALYSIS OF THE BOUNDARY SCAN AS DESIGN FOR TESTING TECHNIQUE", The International Conference on Electrical Engineering, 11, 11th International Conference on Electrical Engineering ICEENG 2018, 2018, 1-9. doi: 10.21608/iceeng.2018.30151
HARVARD
Ibrahim, H., Ragaee, M., Mostafa, H. (2018). 'EXPERMENTAL ANALYSIS OF THE BOUNDARY SCAN AS DESIGN FOR TESTING TECHNIQUE', The International Conference on Electrical Engineering, 11(11th International Conference on Electrical Engineering ICEENG 2018), pp. 1-9. doi: 10.21608/iceeng.2018.30151
VANCOUVER
Ibrahim, H., Ragaee, M., Mostafa, H. EXPERMENTAL ANALYSIS OF THE BOUNDARY SCAN AS DESIGN FOR TESTING TECHNIQUE. The International Conference on Electrical Engineering, 2018; 11(11th International Conference on Electrical Engineering ICEENG 2018): 1-9. doi: 10.21608/iceeng.2018.30151
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