Toward high-speed level-crossing ADCs

The accuracy of measuring the crossing moment of a given signal to a specific reference voltage plays a crucial role in determining the bandwidth of the signal that could be converted by a level-crossing ADC. This timing accuracy is mainly determined by delay dispersion of the comparator and the time0to-digital converter (TDC) comprising the level-crossing ADC. With the pico-second resolution TDC, the delay dispersion of the comparator became the bottle nick of the design of a high speed level-crossing ADC. This paper presents a comparator with low delay dispersion for level-crossing analog-todigital conversion applications. The comparator comprises a technique to compensate the delay dispersion caused by variable input overdrive. The whole circuit is composed of three main blocks, namely, conventional comparator, fixed delay block and variable delay block. The variable delay block is controlled such that it implements the inverse overdrive-delay characteristics of the conventional comparator. Therefore, the overall delay dispersion of the circuit is effectively reduced. Using the proposed technique in a level-crossing ADC would enable the sampling of a signal with 4X higher frequency
than the case of using a conventional comparator keeping the same SNR.