Abstract: Intelligent modems used in military messaging over IP networks require flow control mechanism to prevent overflow of data into its buffers. We contribute for a complete flow control mechanism with built in UART module. All modules are designed using VHDL design entry. All modules are simulated, synthesized then integrated, and downloaded on an FPGA. Timing Simulation results found to be matching with the hardware results obtained from the logic analyzer.
AbouGindia, I., Shehata, K., & Elkfafi, M. (2006). FPGA HARDWARE IMPLIMENTATION FOR EXTERNAL MODEM INTERFACING. The International Conference on Electrical Engineering, 5(5th International Conference on Electrical Engineering ICEENG 2006), 1-9. doi: 10.21608/iceeng.2006.33552
MLA
Islam Tawfik AbouGindia; Khaled Shehata; M. A. Elkfafi. "FPGA HARDWARE IMPLIMENTATION FOR EXTERNAL MODEM INTERFACING", The International Conference on Electrical Engineering, 5, 5th International Conference on Electrical Engineering ICEENG 2006, 2006, 1-9. doi: 10.21608/iceeng.2006.33552
HARVARD
AbouGindia, I., Shehata, K., Elkfafi, M. (2006). 'FPGA HARDWARE IMPLIMENTATION FOR EXTERNAL MODEM INTERFACING', The International Conference on Electrical Engineering, 5(5th International Conference on Electrical Engineering ICEENG 2006), pp. 1-9. doi: 10.21608/iceeng.2006.33552
VANCOUVER
AbouGindia, I., Shehata, K., Elkfafi, M. FPGA HARDWARE IMPLIMENTATION FOR EXTERNAL MODEM INTERFACING. The International Conference on Electrical Engineering, 2006; 5(5th International Conference on Electrical Engineering ICEENG 2006): 1-9. doi: 10.21608/iceeng.2006.33552
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