Design space exploration of PISA architecture for ONU auto-discovery process

Document Type : Original Article

Authors

1 ALaRI, Universita della Svizzera italiana, Lugano, Switzerland.

2 EMC SA, Bellinzona, Switzerland.

3 Etnoteam Spa, Milan, Italy.

Abstract

Abstract:
The goal of the paper is to optimize the PISA architecture for the ONU Auto-discovery
process. This Auto-discovery process has been written in C language following the
IEEE 802.3ah MPCP standard. Using SimpleScalar [3] simulation tool, the architecture
profile is evaluated in order to decide the range of the design exploration. Then, using
Wattch [1] and CACTI [2] simulation tools the CPI, average power consumed and cache
area are calculated for each design point, the cost function is defined and evaluated for
each design point using greedy strategy. The Auto-discovery process has been written in
VHDL and using Synopys power compiler [4] the power consumption has been calculated
and then we compared between the VHDL implementation and the PISA architecture
from the power consumption point of view.

Keywords