Abstract: A new very low power RF mixer is introduced. The proposed mixer is based on two techniques: A CMOS transistor pair is applied to the four cross-coupled commutating transistor (the first technique), and current boosted technique, as described in the paper. The CMOS mixer is simulated in 0.8 μm CMOS technology. The mixer has an input signal of 0.2V and operates on a single 2.5V supply with transistor threshold voltages of 0.57V for all NMOS transistors and -0.52V for all PMOS transistors, and has a power dissipation of 2.3 mW.
ElDeib, A., & AbdelRassoul, R. (2008). Power minimization in CMOS RF mixers. The International Conference on Electrical Engineering, 6(6th International Conference on Electrical Engineering ICEENG 2008), 1-12. doi: 10.21608/iceeng.2008.34312
MLA
Ahmed ElDeib; Roshdy A. AbdelRassoul. "Power minimization in CMOS RF mixers". The International Conference on Electrical Engineering, 6, 6th International Conference on Electrical Engineering ICEENG 2008, 2008, 1-12. doi: 10.21608/iceeng.2008.34312
HARVARD
ElDeib, A., AbdelRassoul, R. (2008). 'Power minimization in CMOS RF mixers', The International Conference on Electrical Engineering, 6(6th International Conference on Electrical Engineering ICEENG 2008), pp. 1-12. doi: 10.21608/iceeng.2008.34312
VANCOUVER
ElDeib, A., AbdelRassoul, R. Power minimization in CMOS RF mixers. The International Conference on Electrical Engineering, 2008; 6(6th International Conference on Electrical Engineering ICEENG 2008): 1-12. doi: 10.21608/iceeng.2008.34312
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